TPA322x

OUT2_P

OUT2_M

OUT1_M

OUT1_P

IN2_M

IN2_P

IN1_P

IN1_M

IN1_P

IN1_M

TPA322x

OUT2_P

OUT2_M

OUT1_M

OUT1_P

IN2_M

IN2_P

IN1_P

IN1_M

IN1_P

IN1_M

TPA322x

OUT2_P

OUT2_M

OUT1_M

OUT1_P

IN2_M

IN1_P

IN2_P

IN1_P

IN1_M

IN1_M

IN2_P

IN2_M

TPA322x

OUT2_P

OUT2_M

OUT1_M

OUT1_P

IN2_M

IN2_P

IN1_P

IN1_M

IN1_P

IN1_M

AVDD

19

TPA3220

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SLASEN3 – JANUARY 2018

Product Folder Links: TPA3220

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Copyright © 2018, Texas Instruments Incorporated

Note that asserting RESET low forces the FAULT signal high, independent of faults being present. TI

recommends monitoring the OTW_CLIP signal using the system microcontroller and responding to an

overtemperature warning signal by turning down the volume to prevent further heating of the device resulting in

device shutdown (OTE).

To reduce external component count, an internal pullup resistor to 3.3 V is provided on both FAULT and

OTW_CLIP outputs.

9.4 Device Functional Modes

TPA3220 can be configured in either a stereo BTL (Bridge Tied Load) mode, mono BTL mode (only one output

BTL channel active), or in a mono PBTL (Parallel Bridge Tied Load) mode. In PBTL mode the two output BTL

channels are parallelled with double output current available. The parallelling of the two BTL outputs can be

made either before the output LC filter, or after the output LC filter. For PBTL mode the audio performance will in

general be higher when parallelling before the output LC filter, but parallelling after the LC output filter may be

preferred in some systems.

See Table 1 for mode configuration setup.

Figure 17. Stereo BTL

Figure 18. Mono BTL

Figure 19. Mono PBTL, Pre LC Filter

Figure 20. Mono PBTL, Post LC Filter

9.4.1 Powering Up

The TPA3220 does not require a power-up sequence because of the integrated undervoltage protection (UVP),

but it is recommended to hold RESET low until PVDD supply voltage is stable to avoid audio artifacts. The

outputs of the H-bridges remain in a high-impedance state until the gate-drive supply (GVDD) and AVDD

voltages are above their UVP voltage thresholds (see the Electrical Characteristics table of this data sheet). This

allows an internal circuit to charge the external bootstrap capacitors by enabling a weak pull-down of the half-

bridge output as well as initiating a controlled ramp up sequence of the output voltage.