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TPA3220 Datasheet(PDF) 15 Page - Texas Instruments |
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TPA3220 Datasheet(HTML) 15 Page - Texas Instruments |
15 / 39 page ![]() OUTP OUTN OUTP Current OUTN Current 0V 0V 0A 0A TPA322x AVDD HEAD TPA322x AVDD HEAD TPA322x SLAVE2 OSCM OSCP TPA322x SLAVE1 OSCM OSCP TPA322x MASTER OSCM OSCP TPA322x SLAVE2 OSCM OSCP TPA322x SLAVE1 OSCM OSCP TPA322x SLAVE1 OSCM OSCP TPA322x SLAVE2 OSCM OSCP RESET RESET RESET RESET RESET RESET RESET 47k 47k AVDD 15 TPA3220 www.ti.com SLASEN3 – JANUARY 2018 Product Folder Links: TPA3220 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated The Master / Slave scheme and the interleaving of the output stage switching is automatically configured by connecting the OSCx pins between a master and multiple slave devices. Connect the OSCx pins in either positive or negative polarity to configure either a Slave1 or Slave2 device. Connect the OSCM of the Master device to the OSCM of a slave device to configure for Slave1 or OSCP to configure for Slave2. Then connect the remaining OSCx pins between the master and slave devices. The Master, Slave1 and Slave2 PWM switching will be 30 degrees out of phase with each other. All switching channels are automatically synchronized by releasing RESET on all devices at the same time. Figure 7. Gain and Master PCB Implementation Placement on the PCB and connection of multiple TPA3220 devices in a multi channel system is illustrated in Figure 7. Slave devices should be placed on either side of the master device, with a Slave1 device on one side of the Master device, and a Slave2 device on the other. In systems with more than 3 TPA3220 devices, the master should be in the middle, and every second slave devices should be a Slave1 or Slave 2 as illustrated in Figure 7. A 47kΩ pull up resistor to AVDD should be connected to the master device OSCM output and a 47kΩ pull down resistor to GND should be connected to the master OSCP CLK outputs. 9.3.3 AD-Mode and HEAD-Mode PWM Modulation TPA3220 has the option of using either AD-Mode or HEAD-Mode PWM modulation scheme. AD mode has continuous switching of the two half bridge outputs in each BTL output channel. Both half bridge outputs are switching in HEAD mode, but with reduced duty cycle for idle operation and while playing small signals. With higher output levels one half bridge stops switching on HEAD mode operation. HEAD benefits both device power loss and EMI performance, where AD mode is considered to have the highest audio performance. SPACE Figure 8. AD-Mode Configuration Figure 9. HEAD-Mode Configuration Figure 10. AD Mode Output Waveforms, Idle |
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