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K4N26323AE Datasheet(PDF) 20 Page - Samsung semiconductor

Part # K4N26323AE
Description  128Mbit GDDR2 SDRAM
Download  52 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4N26323AE Datasheet(HTML) 20 Page - Samsung semiconductor

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- 20 -
Rev. 1.7 (Jan. 2003)
128M GDDR2 SDRAM
K4N26323AE-GC
Precharge Command
The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is
triggered when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Precharge Command can
be used to precharge each bank independently or all banks simultaneously. Three address bits A8, BA0 and BA1 are
used to define which bank to precharge when the command is issued.
Bank Selection for Precharge by Address Bits
Burst Read Operation Followed by Precharge
For the earliest possible precharge, the precharge command may be issued on the rising edge which is CAS latency
(CL) clock cycles before the end of the read burst. A new bank active (command) may be issued to the same bank after
the RAS precharge time (tRP). A precharge command cannot be issued until tRAS is satisfied.
A8
BA1
BA0
Precharged Bank(s)
LOW
LOW
LOW
Bank 0 only
LOW
LOW
HIGH
Bank 1 only
LOW
HIGH
LOW
Bank 2 only
LOW
HIGH
HIGH
Bank 3 only
HIGH
DON’T CARE
DON’T CARE
All Banks 0 ~ 3
CL =7
Burst Read Operation Followed by Precharge: RL = 7 (AL=0, CL=7), tRP= 8
03
2
567
89
10
11
Precharge
NOP
NOP
NOP
NOP
NOP
Active
Bank A
NOP
NOP
DQ
CK, CK
DQS
CMD
READ A
Post CAS
4
> = tRP
NOP
DOUTA0 DOUTA1 DOUTA2 DOUTA3


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