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September 11, 2000

IDT77105

Output Parameters for Transmit Line Signal @ Vcc = 5V ± 10%

Output Parameters for Transmit Line Signal @ Vcc = 5V ± 10%

Output Parameters for Transmit Line Signal @ Vcc = 5V ± 10%

Output Parameters for Transmit Line Signal @ Vcc = 5V ± 10%

Input Parameters for IDT77105 Receive Line Signal

Input Parameters for IDT77105 Receive Line Signal

Input Parameters for IDT77105 Receive Line Signal

Input Parameters for IDT77105 Receive Line Signal

Capacitance (T

Capacitance (T

Capacitance (T

= +25

= +25

= +25°C, f = 1MHz)

C, f = 1MHz)

C, f = 1MHz)

C, f = 1MHz)

Pin Description

Pin Description

Pin Description

Pin Description

Symbol

Parameter

Min.

Typ. Max. Unit

Voh

Output High Voltage for Transmit Line Signal, Ioh = 8mA Vcc - 0.5V —

—

V

Vol

Output Low Voltage for Transmit Line Signal, Ioh = 8mA —

—

0.5

V

Ioh

Output High Current for Transmit Line Signal

—

80

—

mA

Iol

Output Low Current for Transmit Line Signal

—

75

—

mA

Output Impedance

—

20

—

Ohm

Symbol

Parameter

Min.

Typ. Max. Unit

-1

—

1

µA

——

10

pF

Symbol

Parameter

Conditions

Max.

Unit

Output Capacitance

10

pF

Input Capacitance

10

pF

Pin

Name

I/O Interfaces to

Description

1

ALE

I

Utility bus

Address Latch Enable signal. The falling edge of ALE is used to latch the address on AD[7:0].

2

WRB

I

Utility bus

Write Byte Enable (active low).

—

Power Plane

4

RDB

I

Utility bus

Read Byte Enable (active low).

—

Reserved input

6

RxD+

I

Magnetics

Positive Differential receive serial data input.

7

VCC

—

Reserved input

8

RxD-

I

Magnetics

Negative Differential receive serial data input.

—

Reserved input

10

DNC

—

N/A

NOTE: This pin should float.

11

UPLO

O

User defined

User Programmed Latched Output of Reg 0, bit 7 (opposite polarity).

12

PLL_Filter_2

—

Discrete Capacitor

(See Figure 20).

13

RxLED

O

LED

LED driver output (see Figure 8). Pulses low when a cell is being received.

14

TxLED

O

LED

LED driver output (see Figure 8). Pulses low when a cell is being transmitted

15

PLL_Filter_1

—

Discrete Capacitor

(See Figure 20).

16

TXD–

O

Magnetics

Differential Negative transmit serial data output.

17

DNC

O

N/A

NOTE: This pin should float.

18

TxD+

O

Magnetics

Differential Positive transmit serial data output.

19

GND

—

Ground plane

20

TxOsc

I

OSC

Input from an external clock oscillator. 32MHz for 25.6 Mbps; ±100ppm

21

GND

—

Ground plane

Table 1 Pin Description (Part 1 of 2)