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September 11, 2000

IDT77105

LED Driver and HEC Status/Control

LED Driver and HEC Status/Control

LED Driver and HEC Status/Control

LED Driver and HEC Status/Control

Address: 0x03

Address: 0x03

Address: 0x03

Address: 0x03

Low Byte Counter Register [7:0]

Low Byte Counter Register [7:0]

Low Byte Counter Register [7:0]

Low Byte Counter Register [7:0]

Address: 0x04

Address: 0x04

Address: 0x04

Address: 0x04

High Byte Counter Register [15:8]

High Byte Counter Register [15:8]

High Byte Counter Register [15:8]

High Byte Counter Register [15:8]

Address: 0x05

Address: 0x05

Address: 0x05

Address: 0x05

Counter Register Read Select

Counter Register Read Select

Counter Register Read Select

Counter Register Read Select

Note: Only one bit may set at any time for proper operation

Address: 0x06

Address: 0x06

Address: 0x06

Address: 0x06

Master Type Initial State

Function

Bit 7

0

Reserved

Bit 6

R/W

0 = enable

Disable Receive HEC Checking (HEC Enable)

When not set, TC calculates HEC byte on first 4 bytes of received cell, and compares value against 5th byte with this HEC

calculation result

Bit 5

R/W

0 = enable

Disable Xmit HEC Calculate & Replace

Directs TC not to calculate HEC on first 4 bytes of cell queued for transmit and replace 5th byte with this HEC calculation

result

Bit 4, 3

R/W

0 = 1 cycle

RxRef pulse width select

bit # . 4 3 .

0 0 RxRef active for 1 RxClk cycle

0 1 RxRef active for 2 RxClk cycles0

1 0 RxRef active for 4 RxClk cycles

1 1 RxRef active for 8 RxClk cycles

Bit 2

R

1 = empty

FIFO Status 1 = TxFIFO empty 0 = TxFIFO not empty

Bit 1

R

0

TxLED Status 1 = Cell Transmitted 0 = Cell NOT Transmitted

Bit 0

R

0

RxLED Status 1 = Cell Received 0 = Cell NOT Received

Master Type Initial State

Function

Bit [7:0]

R

0x00

Provides low-byte of counter value selected via register 0x06.

Master Type Initial State

Function

Bit [7:0]

R

0x00

Provides high-byte of counter value selected via register 0x06.

Master Type Initial State

Function

Bit 7

—

—

Reserved

Bit 6

—

—

Reserved

Bit 5

—

—

Reserved

Bit 4

—

—

Reserved

Bit 3

W

0

Symbol Error Counter

Bit 2

W

0

TxCell Counter

Bit 1

W

0

RxCell Counter

Bit 0

W

0

Receive HEC Error Counter