CDCM6208V2RGZT datasheet(9/92 Pages) TI1

Part #	CDCM6208V2RGZT

Description	2:8 Clock Generator, Jitter Cleaner With Fractional Dividers

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Manufacturer	TI1 [Texas Instruments]

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9

CDCM6208

www.ti.com

SCAS931G – MAY 2012 – REVISED JANUARY 2018

Product Folder Links: CDCM6208

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6.8

Single-Ended Input Characteristics (SI_MODE[1:0], SDI/SDA/PIN1, SCL/PIN4,

SDO/ADD0/PIN2, SCS/ADD1/PIN3, STATUS1/PIN0, RESETN/PWR, PDN, SYNCN, REF_SEL)

DVDD = 1.71 V to 1.89 V, 2.375 V to 2.625 V, 3.135 V to 3.465 V, TA = –40°C to 85°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

Input high voltage

0.8 ×

DVDD

V

VIL

Input low voltage

0.2 ×

DVDD

V

IIH

Input high current

DVDD = 3.465V, VIH = 3.465 V

(pullup resistor excluded)

30

µA

IIL

Input low current

DVDD = 3.465V, VIL= 0 V

–30

µA

ΔV/ΔT

PDN, RESETN, SYNCN, REF_SEL

input edge rate

20% – 80%

0.75

V/ns

minPulse

PDN, RESETN, SYNCN low pulse

to trigger proper device reset

10

ns

C IN

Input capacitance

2.25

pF

RESETN, PWR, SYNCN, PDN, REF_SEL, SI_MODE[1:0]

R

Input pullup and pulldown resistor

35

50

65

kΩ

SDA and SCL in I 2 C Mode (SI_MODE[1:0]=01)

VHYS_I2C

Input hysteresis

DVDD = 1.8 V

0.1 VDVDD

V

DVDD = 2.5/3.3 V

0.05

VDVDD

V

IH

High-level input current

VI = DVDD

–5

5

µA

VOL

Output low voltage

IOL= 3 mA

0.2 ×

DVDD

V

CIN

Input capacitance pin

5

pF

6.9

Single-Ended Input Characteristics (PRI_REF, SEC_REF)

VDD_PRI, VDD_SEC = 1.71 V to 1.89 V, 2.375 V to 2.625 V, 3.135 V to 3.465 V, TA = –40°C to 85°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fIN

Reference and bypass input

frequency

VDD_PRI/SEC = 1.8 V

0.008

200

MHz

VDD_PRI/SEC = 3.3 V

0.008

250

MHz

VIH

Input high voltage

0.8 ×

VDD_PRI/

VDD_SEC

V

VIL

Input low voltage

0.2 ×

VDD_PRI/

VDD_SEC

V

VHYST

Input hysteresis

20

65

150

mV

IIH

Input high current

VDD_PRI/VDD_SEC = 3.465 V, VIH

= 3.465 V

30

µA

IIL

Input low current

VDD_PRI/VDD_SEC = 3.465 V, VIL

= 0 V

–30

µA

ΔV/ΔT

Reference input edge rate

20% – 80%

0.75

V/ns

IDC SE

Reference input duty cycle

f PRI ≤ 200 MHz

40%

60%

200

≤ fPRI ≤ 250 MHz

43%

60%

C IN

Input capacitance

2.25

pF

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