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AD7707 Datasheet(PDF) 25 Page - Analog Devices |
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AD7707 Datasheet(HTML) 25 Page - Analog Devices |
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25 / 53 page  AD7707 Rev. B | Page 24 of 52 CIRCUIT DESCRIPTION The AD7707 is a Σ-Δ ADC with on-chip digital filtering, intended for the measurement of wide dynamic range, low frequency signals such as those in industrial control or process control applications. It contains a Σ-Δ (or charge balancing) ADC, a calibration microcontroller with on-chip static RAM, a clock oscillator, a digital filter, and a bidirectional serial communica- tions port. The part consumes only 320 μA of power supply current, making it ideal for battery-powered or loop-powered instruments. On-chip thin-film resistors allow ±10 V, ±5 V, 0 V to 10 V, and 0 V to 5 V high level input signals to be directly accommodated on the analog input without requiring split supplies, dc-to-dc converters, or charge pumps. This part operates with a supply voltage of 2.7 V to 3.3 V, or 4.75 V to 5.25 V. The AD7707 contains two low level (AIN1 and AIN2) pro- grammable-gain pseudo differential analog input channels and one high level (AIN3) single-ended input channel. For the low level input channels, the selectable gains are 1, 2, 4, 8, 16, 32, 64, and 128, allowing the part to accept unipolar signals of between 0 mV to 20 mV and 0 V to 2.5 V, or bipolar signals in the range from ±20 mV to ±2.5 V when the reference input voltage equals 2.5 V. With a reference voltage of 1.225 V, the input ranges are from 0 mV to 10 mV to 0 V to 1.225 V in unipolar mode, and from ±10 mV to ±1.225 V in bipolar mode. Note that the signals are with respect to the LOCOM input. The high level input channel can directly accept input signals of ±10 V with respect to HICOM when operating with 5 V supplies and a reference of 2.5 V. With 3 V supplies, ±5 V can be accommodated on the AIN3 input. The input signal to the analog input is continuously sampled at a rate determined by the frequency of the master clock, MCLK IN, and the selected gain. A charge-balancing ADC (Σ-Δ modulator) converts the sampled signal into a digital pulse train whose duty cycle contains the digital information. The programmable gain function on the analog input is also incorporated in this Σ-Δ modulator with the input sampling frequency being modified to give the higher gains. A sinc3 digital low-pass filter processes the output of the Σ-Δ modulator and updates the output register at a rate determined by the first notch frequency of this filter. The output data can be read from the serial port randomly or periodically at any rate up to the output register update rate. The first notch of this digital filter (and therefore its −3 dB frequency) can be programmed via the clock register bits, FS0 to FS2. With a master clock frequency of 2.4576 MHz, the programmable range for this first notch frequency is from 10 Hz to 500 Hz, giving a programmable range for the −3 dB frequency of 2.62 Hz to 131 Hz. With a master clock frequency of 1 MHz, the programmable range for this first notch frequency is from 4 Hz to 200 Hz, giving a programmable range for the −3 dB frequency of 1.06 Hz to 52.4 Hz. The basic connection diagram for the AD7707 is shown in Figure 12. An AD780 or REF192 precision 2.5 V reference provides the reference source for the part. On the digital side, the part is configured for 3-wire operation with CS tied to DGND. A quartz crystal or ceramic resonator provides the master clock source for the part. In most cases, it is necessary to connect capacitors on the crystal or resonator to ensure that it does not oscillate at overtones of its fundamental operating frequency. The values of capacitors can vary, depending on the manufacturer’s specifications. A similar circuit is applicable for operation with 3 V supplies; in this case, a 1.225 V reference (AD1580) should be used for specified performance. AVDD DVDD ANALOG 5V SUPPLY 10µF AIN1 AIN2 LOCOM AIN3 VBIAS HICOM LOW LEVEL ANALOG INPUT HIGH LEVEL ANALOG INPUT AGND DGND REF IN(+) REF IN(–) 10µF VIN ANALOG 5V SUPPLY AD780/ REF192 VOUT GND AD7707 DRDY DATA READY DOUT RECEIVE (READ) DIN SERIAL DATA SCLK SERIAL CLOCK RESET 5V CS MCLK IN MCLK OUT CRYSTAL OR CERAMIC RESONATOR 0.1µF 0.1µF 0.1µF Figure 12. Basic Connection Diagram for 5 V Operation |
Similar Part No. - AD7707_17 |
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Similar Description - AD7707_17 |
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