Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

AD7707 Datasheet(PDF) 15 Page - Analog Devices

Part # AD7707
Description  3-Channel 16-Bit, Sigma-Delta ADC
Download  53 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7707 Datasheet(HTML) 15 Page - Analog Devices

Back Button AD7707_17 Datasheet HTML 11Page - Analog Devices AD7707_17 Datasheet HTML 12Page - Analog Devices AD7707_17 Datasheet HTML 13Page - Analog Devices AD7707_17 Datasheet HTML 14Page - Analog Devices AD7707_17 Datasheet HTML 15Page - Analog Devices AD7707_17 Datasheet HTML 16Page - Analog Devices AD7707_17 Datasheet HTML 17Page - Analog Devices AD7707_17 Datasheet HTML 18Page - Analog Devices AD7707_17 Datasheet HTML 19Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 53 page
background image
AD7707
Rev. B | Page 14 of 52
OUTPUT NOISE
OUTPUT NOISE FOR LOW LEVEL INPUT
CHANNELS (5 V OPERATION)
Table 7 shows the AD7707 output rms noise and peak-to-peak
resolution in unbuffered mode for the selectable notch and
−3 dB frequencies for the part, as selected by FS0, FS1, and FS2
of the clock register. The numbers given are for the bipolar
input ranges with a VREF of 2.5 V and AVDD = 5 V. These
numbers are typical and are generated at an analog input voltage of
0 V. Table 8 shows the rms noise and peak-to-peak resolution
when operating in buffered mode. It is important to note that
the peak-to-peak numbers represent the resolution for which
there is no code flicker. They are not calculated based on rms
noise but on peak-to-peak noise. The numbers given are for
bipolar input ranges with a VREF of 2.5 V. These numbers are
typical and are rounded to the nearest LSB. The numbers apply
for the CLKDIV bit of the clock register set to 0. The output
noise comes from two sources. The first is the electrical noise in
the semiconductor devices (device noise) used in the
implementation of the modulator. Secondly, when the analog
input is converted into the digital domain, quantization noise is
added. The device noise is at a low level and is independent of
frequency. The quantization noise starts at an even lower level
but rises rapidly with increasing frequency to become the
dominant noise source. The numbers in Table 7 and Table 8 are
given for the bipolar input ranges. For the unipolar ranges, the
rms noise numbers are the same as the bipolar range but the
peak-to-peak resolution is now based on half the signal range,
which effectively means losing one bit of resolution.
Table 7. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 5 V AIN1 and AIN2 Unbuffered Mode Only
Filter First Notch
and Output Data
Rate
−3 dB
Frequency
Typical Output RMS Noise in μV (Peak-to-Peak Resolution in Bits)
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
MCLK IN = 2.4576 MHz
10 Hz
2.62 Hz
1.2 (16)
0.7 (16)
0.7 (16)
0.54 (16)
0.28 (16)
0.28 (16)
0.28 (15.5)
0.27 (14.5)
50 Hz
13.1 Hz
3.6 (16)
2.1 (16)
1.25 (16)
0.89 (16)
0.62 (16)
0.60 (15.5)
0.56 (14.5)
0.56 (13.5)
60 Hz
15.72 Hz
4.7 (16)
2.6 (16)
1.5 (16)
0.94 (16)
0.73 (16)
0.68 (15.5)
0.66 (14.5)
0.63 (13.5)
250 Hz
65.5 Hz
95 (13)
65 (13)
23.4 (13)
11.6 (13)
6.5 (13)
3.4 (13)
2.1 (12.5)
1.5 (12)
500 Hz
131 Hz
600 (10.5)
316 (10.5)
138 (10.5)
71 (10.5)
38 (10.5)
18 (10.5)
10 (10)
5.7 (10)
MCLK IN = 1 MHz
4.05 Hz
1.06 Hz
1.19 (16)
0.69 (16)
0.71 (16)
0.63 (16)
0.27 (16)
0.27 (16)
0.26 (15.5)
0.24 (15)
20 Hz
5.24 Hz
3.68 (16)
2.18 (16)
1.19 (16)
0.94 (16)
0.6 (16)
0.6 (15.5)
0.56 (14.5)
0.56 (13.5)
25 Hz
6.55 Hz
4.78 (16)
2.66 (16)
1.51 (16)
1.07 (16)
0.7 (16)
0.67 (15.5)
0.66 (14.5)
0.65 (13.5)
100 Hz
26.2 Hz
100 (13)
50.1 (13)
23.5 (13)
11.9 (13)
5.83 (13)
3.64 (13)
2.16 (12.5)
1.5 (12)
200 Hz
52.5 Hz
543 (10.5)
318 (10.5)
132 (10.5)
68.1 (10.5)
33.1 (10.5)
17.6 (10.5)
9.26 (10.5)
6.13 (10)
Table 8. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 5 V AIN1 and AIN2 Buffered Mode Only
Filter First Notch
and Output Data
Rate
−3 dB
Frequency
Typical Output RMS oise in μV (Peak-to-Peak Resolution in Bits)
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
MCLK IN = 2.4576 MHz
10 Hz
2.62 Hz
1.47 (16)
0.95 (16)
0.88 (16)
0.55 (16)
0.42 (16)
0.42 (16)
0.42 (15)
0.41 (14)
50 Hz
13.1 Hz
4.2 (16)
2.6 (16)
1.6 (16)
1 (16)
0.89 (15.5)
0.94 (15)
0.9 (14)
0.9 (13)
60 Hz
15.72 Hz
4.9 (16)
3 (16)
1.8 (16)
1.1 (16)
1 (15.5)
1 (14.5)
0.94 (14)
0.94 (13)
250 Hz
65.5 Hz
104 (13)
52 (13)
26 (13)
14 (13)
6.5 (13)
4.1 (12.5)
2.7 (12.5)
2.3 (11.5)
500 Hz
131 Hz
572 (10.5)
293 (10.5)
125 (10.5)
69 (10.5)
40 (10.5)
19 (10.5)
10 (10.5)
5.9 (10)
MCLK IN = 1 MHz
4.05 Hz
1.06 Hz
1.48 (16)
8.95 (16)
0.87 (16)
0.67 (16)
0.41 (16)
0.40 (16)
0.40 (15)
0.40 (14)
20 Hz
5.24 Hz
3.9 (16)
2.46 (16)
1.77 (16)
1.19 (16)
0.94 (16)
0.93 (15)
0.95 (14)
0.9 (13)
25 Hz
6.55 Hz
5.37 (16)
3.05 (16)
1.89 (16)
1.33 (16)
1.11 (15.5)
1.06 (14.5)
1.04 (13.5)
1.02 (12.5)
100 Hz
26.2 Hz
98.9 (13)
52.4 (13)
26.1 (13)
12.7 (13)
6.08 (13)
4.01 (12.5)
2.62 (12.5)
2.33 (11.5)
200 Hz
52.4 Hz
596 (10.5)
298 (10.5)
133 (10.5)
69.3 (10.5)
34.7 (10.5)
16.9 (10.5)
9.67 (10.5)
6.34 (10)


Similar Part No. - AD7707_17

ManufacturerPart #DatasheetDescription
logo
Analog Devices
AD7707 AD-AD7707_15 Datasheet
693Kb / 52P
   3-Channel 16-Bit, Sigma-Delta ADC
REV. B
More results

Similar Description - AD7707_17

ManufacturerPart #DatasheetDescription
logo
Analog Devices
AD7707 AD-AD7707_15 Datasheet
693Kb / 52P
   3-Channel 16-Bit, Sigma-Delta ADC
REV. B
AD7715 AD-AD7715_15 Datasheet
495Kb / 40P
   16-Bit, Sigma-Delta ADC
REV. D
AD7715 AD-AD7715_17 Datasheet
897Kb / 41P
   16-Bit, Sigma-Delta ADC
ADUM7703 AD-ADUM7703_V01 Datasheet
353Kb / 22P
   16-Bit, Isolated, Sigma-Delta ADC
Rev. A
ADUM7703 AD-ADUM7703 Datasheet
351Kb / 22P
   16-Bit, Isolated, Sigma-Delta ADC
AD7171 AD-AD7171 Datasheet
284Kb / 16P
   16-Bit Low Power Sigma-Delta ADC
REV. 0
AD7171 AD-AD7171_17 Datasheet
313Kb / 17P
   16-Bit, Low Power, Sigma-Delta ADC
logo
Linear Technology
LTC2439-1 LINER-LTC2439-1 Datasheet
288Kb / 28P
   8-/16-Channel 16-Bit No Latency Delta-Sigma ADC
logo
Maxim Integrated Produc...
MX7705 MAXIM-MX7705 Datasheet
664Kb / 34P
   16-Bit, Low-Power, 2-Channel, Sigma-Delta ADC
Rev 0; 10/03
MX7705 MAXIM-MX7705_10 Datasheet
528Kb / 33P
   16-Bit, Low-Power, 2-Channel, Sigma-Delta ADC
Rev 4; 2/10
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com