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AD7707 Datasheet(PDF) 38 Page - Analog Devices |
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AD7707 Datasheet(HTML) 38 Page - Analog Devices |
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38 / 53 page  AD7707 Rev. B | Page 37 of 52 CONFIGURING THE AD7707 The AD7707 contains six on-chip registers that the user can accesses via the serial interface. Communication with any of these registers is initiated by writing to the communications register first. Figure 22 outlines a flow diagram of the sequence used to configure all registers after a power-up or reset on the AD7707. The flowchart also shows two different read options— the first in which the DRDY pin is polled to determine when an update of the data register has taken place, the second in which the DRDY bit of the communications register is interrogated to determine if a data register update has taken place. Also included in the flowing diagram is a series of words that should be writ- ten to the registers for a particular set of operating conditions. These conditions are gain of 1, no filter sync, bipolar mode, buffer off, clock of 4.9512 MHz, and an output rate of 50 Hz. DOUT SCLK CS DRDY MSB t5 t7 t8 t9 LSB t6 t3 t4 t10 Figure 20. Read Cycle Timing Diagram DIN SCLK CS MSB LSB t11 t12 t15 t16 t13 t14 Figure 21. Write Cycle Timing Diagram |
Similar Part No. - AD7707_17 |
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Similar Description - AD7707_17 |
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