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SY100S838ZI Datasheet (PDF) - Micrel Semiconductor

SY100S838ZI Datasheet PDF - Micrel Semiconductor
Part # SY100S838ZI
Download  SY100S838ZI Download

File Size   73.62 Kbytes
Page   4 Pages
Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor
Description (첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

SY100S838ZI Datasheet (PDF)

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SY100S838ZI Datasheet PDF - Micrel Semiconductor

Part # SY100S838ZI
Download  SY100S838ZI Click to download

File Size   73.62 Kbytes
Page   4 Pages
Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor
Description (첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

SY100S838ZI Datasheet (HTML) - Micrel Semiconductor

SY100S838ZI Datasheet HTML 1Page - Micrel Semiconductor SY100S838ZI Datasheet HTML 2Page - Micrel Semiconductor SY100S838ZI Datasheet HTML 3Page - Micrel Semiconductor SY100S838ZI Datasheet HTML 4Page - Micrel Semiconductor

SY100S838ZI Product details

DESCRIPTION
The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, by using the VBB output, a sinusoidal source can be ACcoupled into the device.

FEATURES
■ 3.3V and 5V power supply options
■ 50ps output-to-output skew
■ Synchronous enable/disable
■ Master Reset for synchronization
■ Internal 75KΩ input pull-down resistors
■ Available in 20-pin SOIC package




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