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K4S560832A-TC/L80 Datasheet (PDF) - Samsung semiconductor

K4S560832A-TC/L80 Datasheet PDF - Samsung semiconductor
Part # K4S560832A-TC/L80
Download  K4S560832A-TC/L80 Download

File Size   126.92 Kbytes
Page   10 Pages
Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor
Description 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL

K4S560832A-TC/L80 Datasheet (PDF)

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K4S560832A-TC/L80 Datasheet PDF - Samsung semiconductor

Part # K4S560832A-TC/L80
Download  K4S560832A-TC/L80 Click to download

File Size   126.92 Kbytes
Page   10 Pages
Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor
Description 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL

K4S560832A-TC/L80 Datasheet (HTML) - Samsung semiconductor

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K4S560832A-TC/L80 Product details

GENERAL DESCRIPTION
The K4S560832A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 8,392,608 words by 8 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
    -. CAS latency (2 & 3)
    -. Burst length (1, 2, 4, 8 & Full page)
    -. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (8K Cycle)




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