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SMJ44C251B-12HMM Datasheet (PDF) - Austin Semiconductor

SMJ44C251B-12HMM Datasheet PDF - Austin Semiconductor
Part # SMJ44C251B-12HMM
Download  SMJ44C251B-12HMM Download

File Size   1265.41 Kbytes
Page   57 Pages
Manufacturer  AUSTIN [Austin Semiconductor]
Direct Link  http://www.austinsemiconductor.com
Logo AUSTIN - Austin Semiconductor
Description 256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM

SMJ44C251B-12HMM Datasheet (PDF)

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SMJ44C251B-12HMM Datasheet PDF - Austin Semiconductor

Part # SMJ44C251B-12HMM
Download  SMJ44C251B-12HMM Click to download

File Size   1265.41 Kbytes
Page   57 Pages
Manufacturer  AUSTIN [Austin Semiconductor]
Direct Link  http://www.austinsemiconductor.com
Logo AUSTIN - Austin Semiconductor
Description 256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM

SMJ44C251B-12HMM Datasheet (HTML) - Austin Semiconductor

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SMJ44C251B-12HMM Product details

DESCRIPTION
The SMJ44C251B/MT42C4256 multiport video RAM is a high-speed, dual-ported memory device. It consists of a dynamic random-access memory (DRAM) organized as 262144 words of 4 bits each interfaced to a serial-data register or serial-access memory (SAM) organized as 512 words of 4 bits each. The SMJ44C251B/MT42C4256 supports three types of operation: random access to and from the DRAM, serial access to and from the serial register, and bidirectional transfer of data between any row in the DRAM and the serial register. Except during transfer operations, the SMJ44C251B/MT42C4256 can be accessed simultaneously and asynchronously from the DRAM and SAM ports.

FEATURES
• Class B High-Reliability Processing
• DRAM: 262144 Words × 4 Bits SAM: 512 Words × 4 Bits
• Single 5-V Power Supply (±10% Tolerance)
• Dual Port Accessibility–Simultaneous and Asynchronous Access From the DRAM and SAM Ports
• Bidirectional-Data-Transfer Function Between the DRAM and the Serial-Data Register
• 4 × 4 Block-Write Feature for Fast Area Fill Operations; As Many as Four Memory Address Locations Written per Cycle From an On-Chip Color Register
• Write-Per-Bit Feature for Selective Write to Each RAM I/O; Two Write-Per-Bit Modes to Simplify System Design
• Enhanced Page-Mode Operation for Faster Access
• CAS-Before-RAS (CBR) and Hidden Refresh Modes
• All Inputs/Outputs and Clocks Are TTL Compatible
• Long Refresh Period: Every 8 ms (Max)
• Up to 33-MHz Uninterrupted Serial-Data Streams
• 3-State Serial I/Os Allow Easy Multiplexing of Video-Data Streams
• 512 Selectable Serial-Register Starting
• Split Serial-Data Register for Simplified Real-Time Register Reload




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