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EP1C12F100C8ES Datasheet (PDF) - Altera Corporation

EP1C12F100C8ES Datasheet PDF - Altera Corporation
Part # EP1C12F100C8ES
Download  EP1C12F100C8ES Download

File Size   1353.16 Kbytes
Page   104 Pages
Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation
Description Cyclone FPGA Family Data Sheet

EP1C12F100C8ES Datasheet (PDF)

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EP1C12F100C8ES Datasheet PDF - Altera Corporation

Part # EP1C12F100C8ES
Download  EP1C12F100C8ES Click to download

File Size   1353.16 Kbytes
Page   104 Pages
Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation
Description Cyclone FPGA Family Data Sheet

EP1C12F100C8ES Datasheet (HTML) - Altera Corporation

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EP1C12F100C8ES Product details

Introduction
The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) interface to meet DDR SDRAM and fast cycle RAM (FCRAM) memory requirements, Cyclone devices are a cost-effective solution for data-path applications. Cyclone devices support various I/O standards, including LVDS at data rates up to 640 megabits per second (Mbps), and 66- and 33-MHz, 64- and 32-bit peripheral component interconnect (PCI), for interfacing with and supporting ASSP and ASIC devices. Altera also offers new low-cost serial configuration devices to configure Cyclone devices.

Features
The Cyclone device family offers the following features:
■ 2,910 to 20,060 LEs, see Table 1–1
■ Up to 294,912 RAM bits (36,864 bytes)
■ Supports configuration through low-cost serial configuration device
■ Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards
■ Support for 66- and 33-MHz, 64- and 32-bit PCI standard
■ High-speed (640 Mbps) LVDS I/O support
■ Low-speed (311 Mbps) LVDS I/O support
■ 311-Mbps RSDS I/O support
■ Up to two PLLs per device provide clock multiplication and phase shifting
■ Up to eight global clock lines with six clock resources available per
   logic array block (LAB) row
■ Support for external memory, including DDR SDRAM (133 MHz),
   FCRAM, and single data rate (SDR) SDRAM
■ Support for multiple intellectual property (IP) cores, including
   Altera® MegaCore® functions and Altera Megafunctions Partners
   Program (AMPPSM) megafunctions.




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About Altera Corporation


Altera Corporation was an American manufacturer of programmable logic devices (PLDs), reconfigurable complex digital circuits. It was acquired by Intel Corporation in 2015 and is now a subsidiary of Intel.

Founded in 1983, Altera was one of the pioneers in the field of programmable logic, offering a range of PLD products including field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), and specialized chips for digital signal processing and memory interface functions. The company's products were used in a variety of applications including communication systems, industrial automation, medical equipment, and military systems.

Altera was known for its innovation in the PLD market, including the development of high-density FPGAs and low-power, high-performance CPLDs. With its acquisition by Intel, Altera continues to provide PLD solutions for its customers, leveraging the resources and technology of one of the world's largest technology companies.

*This information is for general informational purposes only, we will not be liable for any loss or damage caused by the above information.




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