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IS61LV632A Datasheet (PDF) - Integrated Silicon Solution, Inc

IS61LV632A Datasheet PDF - Integrated Silicon Solution, Inc
Part No. IS61LV632A
Download  IS61LV632A Click to view

File Size   122.25 Kbytes
Page   16 Pages
Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc
Description 32K x 32 SYNCHRONOUS FAST STATIC RAM

IS61LV632A Datasheet (PDF)

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IS61LV632A Datasheet PDF - Integrated Silicon Solution, Inc

Part No. IS61LV632A
Download  IS61LV632A Click to view

File Size   122.25 Kbytes
Page   16 Pages
Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc
Description 32K x 32 SYNCHRONOUS FAST STATIC RAM

IS61LV632A Datasheet (HTML) - Integrated Silicon Solution, Inc

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IS61LV632A Product details

DESCRIPTION
The ISSI IS61LV632A is a high-speed, low-power synchronous static RAM designed to provide a burstable, highperformance, secondary cache for the i486™, Pentium™, 680X0™, and PowerPC™ microprocessors. It is organized as 32,768 words by 32 bits, fabricated with ISSIs advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.

FEATURES
• Fast access time:
   – 4 ns-125 MHz; 5 ns-100 MHz;
      6 ns-83 MHz; 7 ns-75 MHz; 8 ns-66 MHz
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and control
• Pentium™ or linear burst sequence control using MODE input
• Three chip enables for simple depth expansion and address pipelining
• Common data inputs and data outputs
• Power-down control by ZZ input
• JEDEC 100-Pin TQFP and PQFP package
• 3.3V Vcc and 2.5V VCCQ for 2.5V I/Os
• Two Clock enables and one Clock disable to eliminate multiple bank bus contention.
• Control pins mode upon power-up:
   – MODE in interleave burst mode
   – ZZ in normal operation mode
      These control pins can be connected to GNDQ or VCCQ to alter their power-up state



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