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K4H511638D Datasheet (PDF) - Samsung semiconductor

K4H511638D Datasheet PDF - Samsung semiconductor
Part # K4H511638D
Download  K4H511638D Download

File Size   366.45 Kbytes
Page   24 Pages
Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor
Description 512Mb D-die DDR SDRAM Specification 66 TSOP-II with Pb-Free (RoHS compliant)

K4H511638D Datasheet (PDF)

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K4H511638D Datasheet PDF - Samsung semiconductor

Part # K4H511638D
Download  K4H511638D Click to download

File Size   366.45 Kbytes
Page   24 Pages
Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor
Description 512Mb D-die DDR SDRAM Specification 66 TSOP-II with Pb-Free (RoHS compliant)

K4H511638D Datasheet (HTML) - Samsung semiconductor

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K4H511638D Product details

Key Features

• VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333

• VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400

• Double-data-rate architecture; two data transfers per clock cycle

• Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16)

• Four banks operation

• Differential clock inputs(CK and CK)

• DLL aligns DQ and DQS transition with CK transition

• MRS cycle with address key programs

   -. Read latency : DDR266(2, 2.5 Clock), DDR333(2.5 Clock), DDR400(3 Clock)

   -. Burst length (2, 4, 8)

   -. Burst type (sequential & interleave)

• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)

• Data I/O transactions on both edges of data strobe

• Edge aligned data output, center aligned data input

• LDM,UDM for write masking only (x16)

• DM for write masking only (x4, x8)

• Auto & Self refresh

• 7.8us refresh interval(8K/64ms refresh)

• Maximum burst refresh cycle : 8

• 66pin TSOP II Pb-Free package

• RoHS compliant



 




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