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74LVC74A-Q100 Datasheet (PDF) - Nexperia B.V. All rights reserved

74LVC74A-Q100 Datasheet PDF - Nexperia B.V. All rights reserved
Part No. 74LVC74A-Q100
Download  74LVC74A-Q100 Click to view

File Size   722.92 Kbytes
Page   18 Pages
Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Description Dual D-type flip-flop with set and reset; positive-edge trigger

74LVC74A-Q100 Datasheet (PDF)

Go To PDF Page Download Datasheet
74LVC74A-Q100 Datasheet PDF - Nexperia B.V. All rights reserved

Part No. 74LVC74A-Q100
Download  74LVC74A-Q100 Click to view

File Size   722.92 Kbytes
Page   18 Pages
Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Description Dual D-type flip-flop with set and reset; positive-edge trigger

74LVC74A-Q100 Datasheet (HTML) - Nexperia B.V. All rights reserved

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74LVC74A-Q100 Product details

General description
The 74LVC74A-Q100 is a dual edge triggered D-type flip-flop. It has individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.
Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits
■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)
   ◆ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
■ 5 V tolerant inputs for interlacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low power consumption
■ Direct interface with TTL levels
■ ESD protection:
   ◆ MIL-STD-883, method 3015 exceeds 2000 V
   ◆ HBM JESD22-A114F exceeds 2000 V
   ◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
■ Multiple package options



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