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JESD204B Datasheet, PDF |
| Searched Keyword : 'JESD204B' - Total: 107 (1/6) Pages |
| Manufacturer | Part # | Datasheet | Description |
|
Analog Devices |
AD9675 | 80Kb/2P |
Octal Ultrasound AFE with JESD204B Rev. PrB |
|
Texas Instruments |
LMK0482X | 2Mb/114P |
JEDEC JESD204B Support |
|
Linear Technology |
LTC2122 | 930Kb/50P |
Dual 14-Bit 170Msps ADC with JESD204B Serial Outputs |
| LTC2123 | 879Kb/50P |
Dual 14-Bit 250Msps ADC with JESD204B Serial Outputs | |
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Texas Instruments |
LMK04821 | 2Mb/113P |
Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner |
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Silicon Laboratories |
SI5380 | 1Mb/53P |
Ultra-Low Phase Noise, 12-output JESD204B Clock Generator |
|
Integrated Device Techn... |
8V79S680 | 736Kb/52P |
JESD204B Compliant Fanout Buffer and Divider |
|
Analog Devices |
HMC7043 | 919Kb/44P |
JEDEC JESD204B support |
| HMC7044 | 1Mb/72P |
JESD204B clock generation | |
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Texas Instruments |
LMK04828-EP | 2Mb/102P |
Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner |
|
Integrated Device Techn... |
8V79S680 | 698Kb/49P |
JESD204B-Compliant Fanout Buffer and Divider |
|
Analog Devices |
AD9675 | 842Kb/61P |
Octal Ultrasound AFE with JESD204B |
|
Silicon Laboratories |
SI5380-D | 1Mb/53P |
Ultra-Low Phase Noise, 12-output JESD204B Clock Generator |
|
Linear Technology |
LTC6951 | 524Kb/6P |
Multichannel JESD204B ADC with Clocking |
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Analog Devices |
AD9528 | 1Mb/67P |
JESD204B Clock Generator with 14 LVDS/HSTL Outputs |
| LTC6952 | 949Kb/80P |
Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B Support | |
|
Texas Instruments |
LMK04828-EP | 2Mb/102P |
Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner |
|
Analog Devices |
AD9207 | 2Mb/25P |
12-Bit, 6 GSPS, JESD204B/JESD204C Dual ADC Rev. 0 |
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Renesas Technology Corp |
8V79S680 | 1Mb/46P |
JESD204B Compliant Fanout Buffer and Divider January 11, 2019 |
| 8V79S683 | 1Mb/53P |
JESD204B/C Compliant Fanout Buffer and Divider September 13, 2021 |
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