1. Overview:

· The ADV7120 is a video decoder. It takes composite video signals and converts them into separate red, green, and blue (RGB) signals.
· It's designed for direct driving of 75Ω coaxial cables for video output.

2. Pin Functions (Most Important):


· Control/Sync Signals:
* BLANK: Composite blanking control. A logic zero blanks the RGB outputs.
* SYNC: Composite sync control. A logic zero switches off the sync current source on the ISYNC output.
* REF WHITE: A logic one forces the RGB outputs to the white level.
· Data Inputs:
* CLOCK: Pixel clock input. The rising edge latches data.
* R0–R7: Red pixel data inputs.
* G0–G7: Green pixel data inputs.
* B0–B7: Blue pixel data inputs.
· Output Signals:
* IOR: Red current output.
* IOG: Green current output.
* IOB: Blue current output.
* ISYNC: Sync current output (related to the green channel).
· Adjustment & Configuration:
* FS ADJUST: Full-scale adjust. A resistor connected to ground sets the video output level. The value of this resistor is crucial for setting the correct output signal level.
* COMP: Compensation pin. Requires a 0.1µF capacitor to VAA for stability.
* VREF: Voltage reference input (must be 1.2V). Requires a 0.1µF decoupling capacitor to VAA.
* VAA: Analog power supply (5V ± 5%). All VAA pins must be connected.
* GND: Ground. All GND pins must be connected.

3. Key Relationships & Formulas (Important for Setup):

· ISYNC Output Current: _ISYNC (mA) =_3,455 ×_ VREF (V)/ RSET (_Ω_)_
· Full-Scale Output Current on IOG (assuming ISYNC is connected to IOG): _RSET (_Ω_) =_12,082 ×_ VREF (V)/IOG (mA)_
· Full-Scale Output Current on IOR and IOB: _IOR, IOB (mA) =_8,628 ×_ VREF (V)/ RSET(_Ω_)_

4. Important Notes/Requirements:

· CLOCK Drive: The CLOCK input should be driven by a dedicated TTL buffer.
· External Components: Requires an external 1.2V voltage reference (VREF) and capacitors (0.1µF) for decoupling.
· Power: All VAA and GND pins *must* be connected.
· FS ADJUST Resistor (RSET): This is the primary way to adjust the video output levels and is critical for proper operation.
· TQFP Package Variation: In the TQFP package, the REF WHITE pin is not available, and the ISYNC pin is internally connected to the IOG pin.

5. Purpose of FS ADJUST

The FS ADJUST pin controls the magnitude of the full-scale video signal. The resistor connected to this pin and ground will alter the current levels to properly scale the video signal.



This summary should give you a solid understanding of the ADV7120's functionality and the essential elements for configuring and using it.