1. Overview:

· The AD28msp01 is a mixed-signal device designed for applications like echo cancellation, wideband speech processing, and audio conferencing. It combines an analog front-end (ADC and DAC) with a serial port for communication with a Digital Signal Processor (DSP).

2. Analog-to-Digital Converter (ADC) - Functionality:

· Input Amplifier: Pre-amplifies the incoming analog signal.
· Sigma-Delta Modulator: Converts the analog signal into a 1-bit stream at a high rate (1.728 MHz).
· Decimation Filter: Reduces the sampling rate and increases resolution (to 16 bits).
· Anti-Aliasing Low-Pass Filter: Further reduces the sampling rate (to 7.2/8.0/9.6 kHz). Can be bypassed, requiring DSP compensation.
· High-Pass Filter: Removes low-frequency components. Can also be bypassed.
· Output: Transfers processed data to the serial port for transmission to a DSP.

3. Digital-to-Analog Converter (DAC) - Functionality:

· Receives Data: Accepts 16-bit digital data from the DSP via the serial port.
· Anti-Imaging Low-Pass Filter: Increases the sampling rate (to 28.8/32/38.4 kHz). Can be bypassed.
· Interpolation Filter: Increases the sampling rate (to 1.728 MHz) using sinc interpolation.
· Sigma-Delta Modulator: Converts the digital data into a 1-bit stream.
· Analog Smoothing Filter: Converts the bit stream to a low-pass analog signal.
· Differential Output Amplifier: Produces the final analog output signals (VOUTP, VOUTN).

4. Serial Port (SPORT):

· Full-Duplex: Allows simultaneous data transmission and reception.
· Synchronous: Requires a shared clock signal.
· 16-bit Words: Transmits data in 16-bit chunks, most significant bit first.
· Clock Rate: 1.728 MHz.
· Control: Managed by the host DSP through the serial port.
· Chip Select (CS): Must be high to enable SPORT operation.

5. Key Design Considerations & Notes:

· Power-Down: Digital circuitry is initially powered down; must be enabled by the host processor setting the PWDD bit.
· Filter Bypassing: Bypassing filters requires the DSP to compensate for the changes in gain and frequency response.
· DSP Compensation: When bypassing filters, DSP must be able to handle the higher data rates (28.8/32/38.4 kHz).
· Differential Outputs: VOUTP and VOUTN should be used as a differential pair; avoid using them as single-ended signals.
· SPORT Configuration: The AD28msp01 is configured for externally generated receive frame sync (SDIFS), internally generated serial clock (SCLK), and internally generated transmit frame sync (SDOFS). The host should be configured opposite.
· Host Processor: The ADSP-2101 and ADSP-2111 are suitable host processors.



In essence, the AD28msp01 is a bridge between the analog audio world and a digital signal processor, allowing for complex audio processing tasks to be performed efficiently.