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MBM29F080A-55PFTR Datasheet (PDF) - SPANSION

MBM29F080A-55PFTR Datasheet PDF - SPANSION
Part # MBM29F080A-55PFTR
Download  MBM29F080A-55PFTR Download

File Size   597.91 Kbytes
Page   44 Pages
Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION
Description FLASH MEMORY CMOS 8M (1M x 8) BIT

MBM29F080A-55PFTR Datasheet (PDF)

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MBM29F080A-55PFTR Datasheet PDF - SPANSION

Part # MBM29F080A-55PFTR
Download  MBM29F080A-55PFTR Click to download

File Size   597.91 Kbytes
Page   44 Pages
Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION
Description FLASH MEMORY CMOS 8M (1M x 8) BIT

MBM29F080A-55PFTR Datasheet (HTML) - SPANSION

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MBM29F080A-55PFTR Product details

■GENERAL DESCRIPTION

The MBM29F080A is a 8 M-bit, 5.0 V-Only Flash memory organized as 1 M bytes of 8 bits each. The 1 M bytes

of data is divided into 16 sectors of 64 K bytes for flexible erase capability. The 8 bit of data will appear on DQ0

to DQ7. The MBM29F080A is offered in a 48-pin TSOP(I), 40-pin TSOP, and 44-pin SOP packages. This device

is designed to be programmed in-system with the standard system 5.0 V VCCsupply. A 12.0 V VPPis not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.



■FEATURES

• Single 5.0 V read, write, and erase

  Minimizes system level power requirements

• Compatible with JEDEC-standard commands

  Pinout and software compatible with single-power supply Flash

Superior inadvertent write protection

• 48-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type)

  40-pin TSOP(I) (Package Suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type)

  44-pin SOP (Package Suffix: PF)

• Minimum 100,000 write/erase cycles

• High performance

  55 ns maximum access time

• Sector erase architecture

  Uniform sectors of 64 K bytes each

  Any combination of sectors can be erased. Also supports full chip erase.

• Embedded Erase™ Algorithms

  Automatically pre-programs and erases the chip or any sector

• Embedded Program™ Algorithms

  Automatically programs and verifies data at specified address

•DataPolling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/Busy output (RY/BY)

  Hardware method for detection of program or erase cycle completion

•Low VCCwrite inhibit ≤3.2 V

• Hardware RESETpin

  Resets internal state machine to the read mode

• Erase Suspend/Resume

  Supports reading or programming data to a sector not being erased

• Sector group protection

  Hardware method that disables any combination of sector groups from write or erase operation (a sector group

consists of 2 adjacent sectors of 64 K bytes each)

• Temporary sector groups unprotection

   Temporary sector unprotection via the RESET pin




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