Functional Description The CY7C4282V/92V are high-speed, low-power, first-in firstout (FIFO) memories with clocked read and write interfaces. All devices are 9 bits wide. The CY7C4282V/92V can be cascaded to increase FIFO depth. Programmable features include Almost Full/Almost Empty flags. These FIFOs provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, video and communications buffering. Features • 3.3V operation for low power consumption and easy integration into low-voltage systems • High-speed, low-power, first-in first-out (FIFO) memories • 64K x 9 (CY7C4282V) • 128K x 9 (CY7C4292V) • 0.35 micron CMOS for optimum speed/power • High-speed, Near Zero Latency (True Dual-Ported Memory Cell), 100-MHz operation (10 ns read/write cycle times) • Low power — ICC = 25 mA — ISB = 6 mA • Fully asynchronous and simultaneous read and write operation • Empty, Full, and Programmable Almost Empty and Almost Full status flags • Retransmit function • Output Enable (OE) pin • Independent read and write enable pins • Supports free-running 50% duty cycle clock inputs • Width Expansion Capability • Depth Expansion Capability through token-passing scheme (no external logic required) • 64-pin 10x10 STQFP • Pin-compatible 3.3V solution for CY7C4282/92
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