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CX82100-42 Datasheet (PDF) - Synaptics Incorporated.

CX82100-42 Datasheet PDF - Synaptics Incorporated.
Part # CX82100-42
Download  CX82100-42 Download

File Size   1419.31 Kbytes
Page   226 Pages
Manufacturer  CONEXANT [Synaptics Incorporated.]
Direct Link  https://www.synaptics.com/
Logo CONEXANT - Synaptics Incorporated.
Description Home Network Processor (HNP)

CX82100-42 Datasheet (PDF)

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CX82100-42 Datasheet PDF - Synaptics Incorporated.

Part # CX82100-42
Download  CX82100-42 Click to download

File Size   1419.31 Kbytes
Page   226 Pages
Manufacturer  CONEXANT [Synaptics Incorporated.]
Direct Link  https://www.synaptics.com/
Logo CONEXANT - Synaptics Incorporated.
Description Home Network Processor (HNP)

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CX82100-42 Product details

Introduction
The Conexant™ CX82100 Home Network Processor (HNP) is a single-chip, 185 MIPS high performance, ARM940T-based processor integrated with multiple network interface hardware functions and packaged into a 196-pin FPBGA. Embedded firmware supports complete networking system solutions in a wide variety of commercial, industrial, business, SOHO, and home applications with appropriate host software.

Features
• Single-chip, high-performance processor with integrated network interfaces
    − ARM940T processor
    − Advanced Microcontroller Bus Architecture (AMBA) with two internal busses
        ♦ Advanced System Bus (ASB)
        ♦ Advanced Peripheral Bus (APB)
    − 16k x 32 internal ROM
    − 8k x 32 internal RAM
    − External Memory Controller (EMC)
    − Two identical 10/100 Mbps IEEE 802.3 Ethernet Media Access Controllers (EMACs) with MII/7-WS interfaces
    − USB 1.1 Slave Interface
    − General Purpose Input/Output (GPIO) signals
    − Timers
    − Interrupt Controller (INTC)
    − Clock Generators
• ARM940T processor
    − ARM9TDMI Core
    − Advanced System Bus (ASB) interface
    − Advanced Peripheral Bus (APB) interface
    − Separate 4 kB instruction and 4 kB data caches
    − Write-back cache scheme and write buffer optimize performance and minimize ASB traffic
    − Five-stage pipeline with fetch, decode, execute, memory and write stages
    − ‘TrackingICE’ mode allows a conventional ICE (in-circuit emulator) mode of operation
• Dual Media Independent Interface (MII) interface to 10/100 Ethernet PHY
• Host Parallel Expansion Bus interface to Flash ROM and other devices
• Parallel interface to SDRAM/SRAM
• JTAG interface
• 22 general purpose I/O lines (13 available for application use, 6 available for application use if optional signals for EEPROM, Host Parallel Expansion Bus, and Clock are not used, and 3 dedicated to system signals)
• 196-pin FPBGA




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